What is Digital Electronics?
Digital Electronics MCQ Practice
Which of the following is correct for Digital Circuits?
What is a Circuit?
Which of the following is an example of a digital Electronic?
Which of the following is a type of digital logic circuit?
Which of the following options comes under the non – saturated logic family in Digital Electronics?
What is a switching function that has more than one output called in Digital Electronics?
Which characteristic of IC in Digital Circuits represents a function of the switching time of a particular transistor?
When can one logic gate drive many other logic gates in Digital Electronics?
Which of the following digital logic circuits can be used to add more than 1 – bit simultaneously?
Which gates in Digital Circuits are required to convert a NOR-based SR latch to an SR flip-flop?
When does a negative level triggered flip-flop in Digital Electronics changes its state?
Which of the following options represent the synchronous control inputs in an S – R flip flop?
What must be used along with synchronous control inputs to trigger a change in the flip flop?
Which of the following majorly determines the number of emitters in a TTL digital circuit?
What will be the output from a D flip – flop if the clock is low and D = 0?
What are the basic gates in MOS logic family?
How must the output of a gate in a TTL digital circuit act when it is HIGH?
What is the minimum distance required for single error detection according to Hamming's analysis in Digital Electronics?
Which of these error-detecting codes enables to find double errors in Digital Electronic devices?
What will be the output from a D flip-flop if D = 1 and the clock is low?
What characteristic will a TTL digital circuit possess due to its multi-emitter transistor?
What input should be given to āSā when SR flip – flop is converted to JK flip – flop?
What value is to be considered for a “don't care condition”?
What is the group of 1s in 4 cells of a K – map called?
What will be the frequency of the output from a JK flip – flop, when J = 1, K = 1, and a clock with pulse waveform is given?
What gate is placed between clock input and the input of AND gate to convert a positive level triggered flip – flop to a negative level triggered flip – flop?
What will a TTL digital circuit possess due to the presence of a multi – emitter transistor?
How must the output of a gate act when it is LOW in a TTL circuit?
Which of the following gives the correct number of multiplexers required to build a 32 x 1 multiplexer?